Nefelus offers the means for innovative small EDA companies to market and produce revenues by offering high quality and over-the-top competitive products in the EDA/semiconductor ecosystem.
Nefelus provides the mechanics for engineers to run your tools instantly and experience new ways of performing IC design tasks on the new world of Web based technologies.
Join the growing club of Nefelus partners that promote technology, innovation, ease of use at the right price! Enable customers in remote geographies to break through the tremendous new challenges in IC design. Be rewarded and get paid on every use.
Symica is an Electronic Design Automation (EDA) tool company that provides tools for the analog and mixed-signal integrated circuit design
http://www.symica.com/Symica with its new core algorithm and visualization technology offers accurate results, intuitive design environment and industry compatible formats and SDK integration.
Symica tools that are available on Nefelus are the Circuit Simulation tool SymSpice and the waveform viewer tool SymProbe.
Nefelus enables anyone to run any Symica tools INSTANTLY on a pay-as-you-go basis. No need to install or buy a machine to run SPICE! Multiple Simulations may be run on powerful multi-threaded machines with zero setup time with a fraction of hardware cost.
Founded in 2006 and privately held by KM Core, now POLYTEDA has built an outstanding team of professionals from the EDA industry. The company engineers have superior experience in developing high-end software for the microelectronics industry. POLYTEDA is supported by R&D team in Kiev, Ukraine and by sales and marketing from TEKSTART, LLC, and has world-wide presence.
http://www.polyteda.com/PowerDRC/LVS is a tool for the physical verification of microelectronic circuits with fastest flat engine on the EDA market.
It can process multiple design rules and design layers simultaneously, dramatically reducing design cycle time, design iterations, compute infrastructure requirements and precious engineering time.
In addition to superiority in processing speed, PowerDRC/LVS can handle huge amounts of data - up to tens of billions of transistors.
Run DRC/LVS tasks on any chip size any time at a fraction of a cost of an annual single-threaded tool license! Run many extra DRC/LVS cycles on your chip before you go to the final tapeout stage
Founded in 2006 and privately held by KM Core, now POLYTEDA has built an outstanding team of professionals from the EDA industry. The company engineers have superior experience in developing high-end software for the microelectronics industry. POLYTEDA is supported by R&D team in Kiev, Ukraine and by sales and marketing from TEKSTART, LLC, and has world-wide presence.
http://www.polyteda.com/
Founded by the author of Pearl, Parallax offers a static timing tool designed from the ground up to be modular, easily integrated with different tools & process flows, and highly compatible with the industry's most popular sign off tool.
http://www.parallaxsw.com/Full featured Static Timing analysis tool, primarily used as an embedded tool in 3rd party EDA Tool platforms is now available as stand-alone.
Static Timing Analysis, a Tcl-based interactive tool, is now available on the cloud just a click away on your web browser via the Nefelus platform. Run your timing verification tasks on fast hardware at a fraction of the cost of an annual single-threaded tool license.
Genesys Ltd was founded in March 1997 by former members of the R&D Institute of Microdevices - the largest and powerful in the USSR institute of integrated circuits development. Genesys develops logical regular structures layout compilers - so-called Memory Generators. The company design team has experience in SRAM, OTP ROM, COTP (eFuse), Register file and DRAM development.
http://www.genesys.com.ua/PowerMG is a synchronous single-port SRAM memory compiler for 180nm CMOS technology.
PowerMG can generate more than 80,000 different memory instances for single-port SRAM. It is based on leaf cells approach that allows to get minimized chip area and timing parameters.
Available memory size is from 128 byte up to 64K. External BIST interface supported.
A user needs to only fill in a web form on Nefelus page and short while later (i.e. minutes) a gds file is generated without any setup of hardware or software!
Genesys Ltd was founded in March 1997 by former members of the R&D Institute of Microdevices - the largest and powerful in the USSR institute of integrated circuits development. Genesys develops logical regular structures layout compilers - so-called Memory Generators. The company design team has experience in SRAM, OTP ROM, COTP (eFuse), Register file and DRAM development.
http://www.genesys.com.ua/